共 50 条
- [1] Verification methodology for a complex System-on-a-Chip [J]. FUJITSU SCIENTIFIC & TECHNICAL JOURNAL, 2000, 36 (01): : 24 - 30
- [3] A structured system methodology for FPGA based system-on-a-chip design [J]. 12TH ANNUAL IEEE SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, PROCEEDINGS, 2004, : 271 - 272
- [4] Core+ASIC methodology: The pursuit of system-on-a-chip [J]. WESCON/97 - CONFERENCE PROCEEDINGS, 1997, : 46 - 54
- [5] A mask reuse methodology for reducing system-on-a-chip cost [J]. 6th International Symposium on Quality Electronic Design, Proceedings, 2005, : 482 - 487
- [6] A Novel Methodology for Multi-Project System-on-a-Chip [J]. 2011 IEEE INTERNATIONAL SOC CONFERENCE (SOCC), 2011, : 308 - 311
- [7] A system-on-a-chip for pattern recognition -: Architecture and design methodology [J]. 5TH INTERNATIONAL WORKSHOP ON COMPUTER ARCHITECTURES FOR MACHINE PERCEPTION, PROCEEDINGS, 2000, : 155 - 162
- [9] CMOS device optimization for system-on-a-chip applications [J]. INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST, 2000, : 455 - 458
- [10] System-on-a-chip CMOS sensors for mobile applications [J]. Advanced Imaging, 2003, 18 (04) : 22 - 24