Analysis of Microprocessor System Interface with Memory

被引：0
|
作者：
Keat, Lim Chun [1 ]
Jambek, Asral Bahari [1 ]
Hashim, Uda [2 ]
机构：
[1] Univ Malaysia Perlis, Sch Microelect Engn, Perlis, Malaysia
[2] Univ Malaysia Perlis, Inst Nano Elect Engn, Perlis, Malaysia
来源：
2015 IEEE INTERNATIONAL CIRCUITS AND SYSTEMS SYMPOSIUM (ICSYS) | 2015年
关键词：
Microprocessor; soft-core processor; SDRAM; memory;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The microprocessor is one of the digital components that is widely used in the market todays. Soft-core microprocessors have been widely used in embedded systems. The soft-core processor has become the target of interest for researchers. In this paper, several soft-core processor architectures and systems are reviewed. Then, the analysis of microprocessor system's interface with memory is carried out. Detailed read and write operations on the memory are discussed and compared with theory. The experiment was carried out by loading the microprocessor system architecture into Altera Cyclone II field programmable gate array (FPGA). The experimental results show that the read and write operations on the memory succeeded. The total power estimation is 203.67mW.
引用
收藏
页码：22 / 26
页数：5
相关论文
共 50 条
  • [21] INTERFACE AND MEMORY MODULES FOR MULTILEVEL-SYSTEM-INTERFACE PROTOCOL
    BASILADZE, SG
    NIKOLAEV, AG
    RYBNIKOV, VM
    INSTRUMENTS AND EXPERIMENTAL TECHNIQUES, 1990, 33 (04) : 811 - 815
  • [22] MEMORY EXPANSION FOR MICROPROCESSOR.
    Anon
    IBM technical disclosure bulletin, 1986, 29 (02): : 924 - 926
  • [23] MEMORY ARCHITECTURE AND INFLUENCE OF MICROPROCESSOR
    PEPPIETTE, G
    MICROELECTRONICS AND RELIABILITY, 1976, 15 (04): : 307 - 313
  • [24] High speed data acquisition system with a dual port RAM microprocessor interface
    Morrison, S.B.
    Gibson, J.R.
    Holmes, R.
    Microprocessors and Microsystems, 1991, 15 (03): : 155 - 159
  • [25] VIRTUAL MEMORY IN MICROPROCESSOR SYSTEMS
    BAL, S
    MARTIN, G
    ELECTRONIC PRODUCTS MAGAZINE, 1982, 25 (06): : 63 - 67
  • [26] MICROPROCESSOR MEMORY MANAGEMENT UNITS
    MILENKOVIC, M
    IEEE MICRO, 1990, 10 (02) : 70 - 85
  • [27] DIGITAL DATA ACQUISITION AND ANALYSIS OF STRIATED-MUSCLE DIFFRACTION PATTERNS WITH A DIRECT MEMORY ACCESS MICROPROCESSOR SYSTEM
    ROOS, KP
    BASKIN, RJ
    LIEBER, RL
    CLINE, JW
    PAOLINI, PJ
    REVIEW OF SCIENTIFIC INSTRUMENTS, 1980, 51 (06): : 762 - 767
  • [28] ANALYSIS OF DATA ALLOCATION EFFICIENCY IN MEMORY OF SPECIALIZED MICROPROCESSOR SYSTEMS.
    Koryachko, V.P.
    Suskin, V.V.
    1600, (18):
  • [29] Microprocessor Soft Error Rate Prediction Based on Cache Memory Analysis
    Houssany, S.
    Guibbaud, N.
    Bougerol, A.
    Leveugle, R.
    Miller, F.
    Buard, N.
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2012, 59 (04) : 980 - 987
  • [30] ECONOMICAL MICROPROCESSOR-DISPLAY INTERFACE
    WILKINSON, AB
    ELECTRONIC ENGINEERING, 1980, 52 (634): : 29 - 29
12345