The Design and Simulation of IIC Communication SOPC Core Based on Avalon Bus

被引：0
|
作者：
Ji, Hongqiang [1 ]
Wang, Yabin [1 ]
Li, Xiaofeng [1 ]
Jia, Tao [2 ]
机构：
[1] Beijing Inst Technol, Sch Mechatron, Beijing 100081, Peoples R China
[2] Beijing Inst Technol, Sch Mech, Beijing 100081, Peoples R China
来源：
2015 International Conference on Computer Science and Mechanical Automation (CSMA) | 2015年
关键词：
IIC core; SOPC; NIOS II;
D O I：
10.1109/CSMA.2015.33
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper, wedesigned IIC into adjustable IP (Intelligent Property) core to shorten the develop cycle of IIC interface and improve the reconstruct ability of the system. InSOPC Builder, the hardware design code of IIC was integrated and defined as aport signal type, forming a called IP core. As a result, the development efficiency of the system is enhanced, the reliability of the system become highand the design of the system is less complicated.
引用
收藏
页码：135 / 138
页数：4
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