共 50 条
- [1] The effect of flow properties on filler settling of underfill in the flip chip package 54TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, VOLS 1 AND 2, PROCEEDINGS, 2004, : 761 - 766
- [3] Effective Package FA procedures on Flip Chip Ball Grid Array (FCBGA) Package with Copper Pillar (CuP) bumps 2018 25TH IEEE INTERNATIONAL SYMPOSIUM ON THE PHYSICAL AND FAILURE ANALYSIS OF INTEGRATED CIRCUITS (IPFA), 2018,
- [4] Effect of underfill fillet configuration on flip chip package reliability TWENTY SEVENTH ANNUAL IEEE/CPMT/SEMI INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY SYMPOSIUM, 2002, : 291 - 303
- [6] Solder Fatigue Modeling of Flip-Chip Bumps in Molded Packages IEMT 2006: 31ST INTERNATIONAL CONFERENCE ON ELECTRONICS MANUFACTURING AND TECHNOLOGY, 2006, : 109 - 114
- [7] Innovative Flip Chip Package Solutions for Automotive Applications 2019 IEEE 69TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2019, : 1432 - 1436
- [8] Study on factors affecting underfill flow and underfill voids in a large-die flip chip ball grid array (FCBGA) package 2007 9TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, VOLS 1 AND 2, 2007, : 640 - 645
- [10] FEM modeling of temperature distribution of a flip-chip no-flow underfill package during solder reflow process IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, 2004, 27 (01): : 86 - 93