Integrated circuit packaging review with an emphasis on 3D packaging

被引:65
|
作者
Lancaster, Austin [1 ]
Keswani, Manish [1 ]
机构
[1] Univ Arizona, Dept Mat Sci & Engn, Tucson, AZ 85721 USA
关键词
Integrated circuit packaging; 3D packaging; Chip stacking; Package processing; Package functions; THROUGH-SILICON; FLIP-CHIP; COPPER; TECHNOLOGY; CHALLENGES; ELECTRODEPOSITION; INTERCONNECTION; RELIABILITY; DENSITY; NICKEL;
D O I
10.1016/j.vlsi.2017.09.008
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
An introduction to the exciting and continuously growing topic of IC packaging is presented herein. This review starts with a beginner's level introduction to microelectronic packaging and its essential functions. These functions include environmental protection, mechanical stability, thermal management, and electrical connection. Important methods and process techniques for satisfying these essential functions are included. Knowledge of this material is important to understand the history and advancements of packaging technology. The history is reviewed in the context of technology advancement drivers and how they have ultimately led to 3D packaging. 3D packaging is the modern milestone in packaging technology, and it is described in detail. 3D packaging technology poses many advantageous but there are also serious design challenges to "overcome. 3D packaging architecture, advantages, processing, and current challenges become the focus in the second half of this paper.
引用
收藏
页码:204 / 212
页数:9
相关论文
共 50 条
  • [1] Convergence of 3D integrated packaging and 3D TSV ICs
    Chhabra, Navjot
    SOLID STATE TECHNOLOGY, 2010, 53 (08) : 22 - 23
  • [2] GENERAL PACKAGING - INTEGRATED-CIRCUIT PACKAGING
    KINSMAN, KR
    MICROPROCESSING AND MICROPROGRAMMING, 1987, 19 (05): : 423 - 423
  • [3] ADVANCED INTEGRATED CIRCUIT PACKAGING
    NEEDHAM, GA
    SEMICONDUCTOR PRODUCTS AND SOLID STATE TECHNOLOGY, 1965, 8 (06): : 22 - &
  • [4] Microsystem packaging in 3D
    Kelly, G
    Alderman, J
    Lyden, C
    Barrett, J
    Morrissey, A
    MICROMACHINED DEVICES AND COMPONENTS III, 1997, 3224 : 142 - 152
  • [5] The future of 3D packaging
    Val, CM
    2ND 1998 IEMT/IMC SYMPOSIUM, 1998, : 261 - 271
  • [6] Volumetric nondestructive metrology for 3D semiconductor packaging: A review
    Su, Yutai
    Shi, Jing
    Hsu, Yuan-Ming
    Ji, Dai-Yan
    Suer, Alexander David
    Lee, Jay
    MEASUREMENT, 2024, 225
  • [7] 3D Packaging Technology for Integrated Antenna Front-Ends
    Bonnet, Barbara
    Monfraix, Philippe
    Chiniard, Renaud
    Chaplain, Jerome
    Drevon, Claude
    Legay, Herve
    Couderc, Pascal
    Cazaux, Jean-Louis
    2008 EUROPEAN MICROWAVE INTEGRATED CIRCUITS CONFERENCE (EUMIC), 2008, : 542 - +
  • [8] 3D Packaging Technology for Integrated Antenna Front-Ends
    Bonnet, Barbara
    Monfraix, Philippe
    Chiniard, Renaud
    Chaplain, Jerome
    Drevon, Claude
    Legay, Herve
    Couderc, Pascal
    Cazaux, Jean-Louis
    2008 EUROPEAN MICROWAVE CONFERENCE, VOLS 1-3, 2008, : 720 - +
  • [9] The continued advancements of 3D packaging
    Jensen, Tim
    Durham, Maria
    Advancing Microelectronics, 2017, 44 (02):
  • [10] INTEGRATED CIRCUIT PACKAGING TRENDS.
    Winkler, Ernel R.
    Solid State Technology, 1982, 25 (06) : 94 - 100