ASYNCHRONOUS SWITCHING FOR LOW-POWER OCTAGON NETWORK-ON-CHIP

被引：1

作者：

El-Moursy, Magdy A. ^{[1
]}

Shawkey, Heba A. ^{[2
]}

机构：

[1] Mentor Graph Corp, Cairo, Egypt

[2] Elect Res Inst, Microelect Dept, Cairo, Egypt

来源：

2010 INTERNATIONAL CONFERENCE ON MICROELECTRONICS | 2010年

关键词：

DESIGN;

D O I：

10.1109/ICM.2010.5696132

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Asynchronous switching is proposed to achieve low power Network on Chip. Asynchronous switching reduces the power dissipation of the network if the activity factor of the data transfer between two ports alpha(d) is less than A alpha(c)+B alpha(dk).Closed form expressions for power dissipation of Octagon topology are provided for both synchronous and asynchronous switching. The area of the asynchronous switch is 50% greater than the area of the synchronous switch. However, the power dissipation of asynchronous switching could be decreased by up to 73.6%. Asynchronous switching becomes more efficient as technology advances and network density increases. A reduction in power dissipation reaches 81.3% for 256 IPs with the same chip size. Even with clock gating, asynchoronous switching achieves significant power reduction of 76.7% for 75% clock activity factor.

引用

页码：256 / 259

页数：4

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