Design of low-power voltage/current references and supply voltage for 9-bit fully differential ADC

This paper presents the design of a low-power voltage reference, bias current and the supply voltage for a 9-bit fully differential ADC. The references, power supply circuits and the ADC are integrated in one circuit, i.e. chip. The proposed chip is implemented in the UMC 0.18 mu m CMOS process and occupies 800x700 mu m(2). The circuit supply voltage V DD is obtained from the external RF signal. When the circuit is active V DD is used as a supply for the rest of the circuitry. The circuit generates supply, reference voltages and currents when V DD exceeds the upper voltage level V-HIGH approximate to 1.82 V. When V DD is lower than the lower voltage level V-LOW approximate to 1.35 V, the circuit is off. When the circuit is active, the current consumption is 22 mu A. The presented results are based on measurements.