2GS/s, 10ps resolution CMOS differential time-to-digital converter for real-time testing of source-synchronous memory device

被引：8

作者：

Yamamoto, K. ^{[1
]}

Suda, M. ^{[1
]}

Okayasu, T. ^{[1
]}

机构：

[1] Advantest Corp, Gunma, Japan

来源：

PROCEEDINGS OF THE IEEE 2007 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2007年

关键词：

D O I：

10.1109/CICC.2007.4405700

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A Differential Time-to-Digital Converter (TDC), fabricated in 0.18 mu m CMOS process, for source-synchronous device testing is demonstrated. It exhibits a maximum sampling rate of 2.133GS/s, a variable resolution of 10-40ps, an infinite measurement range, an INL of 8.5ps(pk-pk), and a jitter of 18.3ps(pk-pk). It: is available to be applied to the jitter histogram measurement without dead-time because it detects all transition timing continuously. Furthermore, a possible application of this TDC to ADC or DAC is suggested.

引用

页码：145 / 148

页数：4

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