Accuracy Analysis of Extraction Methods for Effective Channel Length in Deep-Submicron MOSFETs

被引:3
|
作者
Kim, Ju-Young [1 ]
Choi, Min-Kwon [1 ]
Lee, Seonghearn [1 ]
机构
[1] Hankuk Univ Foreign Studies, Dept Elect Engn, Yongin 449791, Kyungki Do, South Korea
关键词
MOSFET; effective channel length; capacitance; extraction; overlap; fringe;
D O I
10.5573/JSTS.2011.11.2.130
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A comparative study of two capacitance methods to measure the effective channel length in deep-submicron MOSFETs has been made in detail. Since the reduction of the overlap capacitance in the accumulation region is smaller than the addition of the inner fringe capacitance at zero gate voltage, the capacitance method removing the parasitic capacitance in the accumulation region extracts a more accurate effective channel length than the method removing that at zero gate voltage.
引用
收藏
页码:130 / 133
页数:4
相关论文
共 50 条
  • [41] Channel noise modeling of deep submicron MOSFETs
    Chen, CH
    Deen, MJ
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2002, 49 (08) : 1484 - 1487
  • [42] Effective-channel-length extraction for double-diffused MOSFETs
    Ichikawa, S
    Eshima, Y
    Terada, K
    Matsuki, T
    ICMTS 2001: PROCEEDINGS OF THE 2001 INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES, 2001, : 93 - 98
  • [43] Effective-channel-length extraction for double-diffused MOSFETs
    Terada, K
    Ichikawa, S
    Eshima, Y
    Yamauchi, T
    Matsuki, T
    SOLID-STATE ELECTRONICS, 2003, 47 (09) : 1465 - 1470
  • [44] A new model for thermal channel noise of deep-submicron MOSFETS and its application in RF-CMOS design
    Knoblinger, G
    Klein, P
    Tiebout, M
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2001, 36 (05) : 831 - 837
  • [45] AN ANALYTICAL MODEL FOR HOT-CARRIER-INDUCED DEGRADATION OF DEEP-SUBMICRON N-CHANNEL LDD MOSFETS
    GOO, JS
    KIM, YG
    LYEE, H
    KWON, HY
    SHIN, H
    SOLID-STATE ELECTRONICS, 1995, 38 (06) : 1191 - 1196
  • [46] Practical accuracy analysis of some existing effective channel length and series resistance extraction methods for MOSFET's
    Biesemans, S
    Hendriks, M
    Kubicek, S
    De Meyer, K
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1998, 45 (06) : 1310 - 1316
  • [47] Investigations on Proton-Irradiation-Induced Spacer Damage in Deep-Submicron MOSFETs
    Xue, Shoubin
    Wang, Pengfei
    Huang, Ru
    Wu, Dake
    Pei, Yunpeng
    Wang, Wenhua
    Zhang, Xing
    2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, VOLS 1-4, 2008, : 655 - 658
  • [48] THE EFFECT OF DYNAMIC DESIGN PROCESSING FOR YIELD ENHANCEMENT IN THE FABRICATION OF DEEP-SUBMICRON MOSFETS
    SITTE, R
    DIMITRIJEV, S
    HARRISON, HB
    IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, 1994, 7 (01) : 92 - 96
  • [49] Analysis of the Flash ADC Bandwidth-Accuracy Tradeoff in Deep-Submicron CMOS Technologies
    Ismail, Ayman
    Elmasry, Mohamed
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2008, 55 (10) : 1001 - 1005
  • [50] A new threshold voltage model for deep-submicron MOSFETs with nonuniform substrate dopings
    Zhang, WL
    Yang, ZL
    MICROELECTRONICS AND RELIABILITY, 1998, 38 (09): : 1465 - 1469