State assignment and logic optimization for finite state machines

被引:0
|
作者
Czerwinski, Robert [1 ]
Kania, Dariusz [1 ]
机构
[1] Silesian Tech Univ, Inst Elect, PL-44100 Gliwice, Poland
关键词
state assignment; logic optimization; finite state machine; CPLD; FSM;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
An FSM synthesis for PAL-based CPLDs is presented in the paper. A new approach consisted of the original method of the state assignment and PAL-oriented multi-level optimization is proposed. The aim of the proposed heuristic method is oriented on the area minimization. Presented state assignment method takes into consideration elements of two-level minimization, while the essence of PAL-oriented multi-level optimization is to search for multi-output implicants that can be shared by several functions. Results of experiments prove the effectiveness of the method for CPLD structures consist of PAL-based logic blocks.
引用
收藏
页码:39 / 44
页数:6
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