Mitigating DIBL and Short-Channel Effects for III-V FinFETs With Negative-Capacitance Effects

被引:6
|
作者
Huang, Shih-En [1 ]
You, Wei-Xiang [1 ]
Su, Pin [1 ]
机构
[1] Natl Yang Ming Chiao Tung Univ, Inst Elect, Hsinchu 30010, Taiwan
关键词
Indium gallium arsenide; FinFETs; Silicon; Numerical models; Tunneling; Logic gates; Electric potential; Negative-capacitance FET (NCFET); drain induced barrier lowering (DIBL); short-channel effect; III-V FinFET; InGaAs; INGAAS; SENSITIVITY; VOLTAGE; IMPACT;
D O I
10.1109/JEDS.2021.3133453
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper, based on the IRDS 2022 technology node, investigates the DIBL and short-channel effects for InGaAs negative-capacitance FinFETs (NC-FinFETs) through a theoretical subthreshold drain current model considering key effects including negative capacitance, quantum confinement and source-to-drain tunneling. Due to the impact of negative capacitance on the source-to-drain potential profile, tunneling distance and its drain-bias dependence, the short-channel effects can be substantially improved for InGaAs NC-FinFETs. Our study indicates that, with the larger NC effect of the III-V channel, the gap in DIBL and subthreshold swing between InGaAs and Si FinFETs in the sub-20 nm gate-length regime can become much closer. Our study may provide insights for future supply-voltage/power scaling of logic devices with high-mobility channel.
引用
收藏
页码:65 / 71
页数:7
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