Growth of InP directly on Si by corrugated epitaxial lateral overgrowth

被引:22
|
作者
Metaferia, Wondwosen [1 ]
Kataria, Himanshu [1 ]
Sun, Yan-Ting [1 ]
Lourdudoss, Sebastian [1 ]
机构
[1] KTH Royal Inst Technol, Dept Mat & Nano Phys, Lab Semicond Mat, S-16440 Kista, Sweden
基金
瑞典研究理事会;
关键词
corrugated epitaxial lateral overgrowth; InP-Si interface; HVPE; supersaturation; CHEMICAL-VAPOR-DEPOSITION; CONFORMAL GROWTH; PHASE EPITAXY; SILICON; GAAS; GAP;
D O I
10.1088/0022-3727/48/4/045102
中图分类号
O59 [应用物理学];
学科分类号
摘要
In an attempt to achieve an InP-Si heterointerface, a new and generic method, the corrugated epitaxial lateral overgrowth (CELOG) technique in a hydride vapor phase epitaxy reactor, was studied. An InP seed layer on Si (0 0 1) was patterned into closely spaced etched mesa stripes, revealing the Si surface in between them. The surface with the mesa stripes resembles a corrugated surface. The top and sidewalls of the mesa stripes were then covered by a SiO2 mask after which the line openings on top of the mesa stripes were patterned. Growth of InP was performed on this corrugated surface. It is shown that growth of InP emerges selectively from the openings and not on the exposed silicon surface, but gradually spreads laterally to create a direct interface with the silicon, hence the name CELOG. We study the growth behavior using growth parameters. The lateral growth is bounded by high index boundary planes of {3 3 1} and {2 1 1}. The atomic arrangement of these planes, crystallographic orientation dependent dopant incorporation and gas phase supersaturation are shown to affect the extent of lateral growth. A lateral to vertical growth rate ratio as large as 3.6 is achieved. X-ray diffraction studies confirm substantial crystalline quality improvement of the CELOG InP compared to the InP seed layer. Transmission electron microscopy studies reveal the formation of a direct InP-Si heterointerface by CELOG without threading dislocations. While CELOG is shown to avoid dislocations that could arise due to the large lattice mismatch (8%) between InP and Si, staking faults could be seen in the layer. These are probably created by the surface roughness of the Si surface or SiO2 mask which in turn would have been a consequence of the initial process treatments. The direct InP-Si heterointerface can find applications in high efficiency and cost-effective Si based III-V semiconductor multijunction solar cells and optoelectronics integration.
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页数:9
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