One promising application of CNTs in microelectronics is to use vertically aligned CNT (VACNT) arrays as novel thermal interface materials (TIMs). CNTs have high intrinsic thermal conductivity, a combination of flexibility and rigidity, small coefficient of thermal expansion and high thermal and chemical stability, etc. However, large interfacial thermal resistance between CNTs and contact substrates has been found and become the main barrier against VACNT application as TIMs. Basically, there are two VACNT TIM/substrate interfaces in a typical TIM assembly: the VACNT/growth substrate interface and the VACNT/mating substrate interface. In terms of the growth substrate, given the high temperature required (typically > 600 degrees C) for VACNT syntheses, direct synthesis of a VACNT TIM layer on the backside of a silicon chip is not compatible with current electronic packaging systems. Instead, VACNT synthesis on the copper lid surface is preferred. However, VACNT synthesis on bulk copper substrates has for long been a big challenge. In this study, we delivered a remarkable progress on fast synthesis of high-quality VACNTs on bulk copper substrates by introducing a well-controlled conformal alumina layer as the support layer for VACNT synthesis. The key roles of the support layer were discussed. As for reducing the contact thermal resistance at the VACNT/mating substrate interface, a chemical anchoring process using molecular phonon coupler (MPC) was developed. A proper MPC was chosen to covalently bond the VACNTs to the Si substrate surface and, therefore, to enhance interfacial thermal transport. Experimental results indicated that such an interface modification improved the effective thermal diffusivity of the carbon nanotube-mediated thermal interface by an order of magnitude and the equivalent thermal conductivity by two orders of magnitude, compared with other VACNT assembling processes. This remarkable breakthrough undoubtedly provides a viable commercial VACNT application for thermal management in microelectronic and photonic packaging, and opens up a new field in the design of CNT/substrate interfaces.