Fast, large-scale string match for a 10Gbps FPGA-based network Intrusion Detection System

被引:0
|
作者
Sourdis, I [1 ]
Pnevmatikatos, D
机构
[1] Tech Univ Crete, Dept Elect & Comp Engn, Microprocessor & Hardware Lab, GR-73100 Khania, Greece
[2] Fdn Res & Technol Hellas, Inst Comp Sci, GR-71110 Iraklion, Greece
关键词
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Intrusion Detection Systems such as Snort scan incoming packets for evidence of security threats. The most computation-intensive part of these systems is a text search against hundreds of patterns, and must be performed at wire-speed. FPGAs are particularly well suited for this task and several such systems have been proposed. In this paper we expand on previous work, in order to achieve and exceed a processing bandwidth of 11Gbps. We employ a scalable, low-latency architecture, and use extensive fine-grain pipelining to tackle the fan-out, match, and encode bottlenecks and achieve operating frequencies in excess of 340MHz for fast Virtex devices. To increase throughput, we use multiple comparators and allow for parallel matching of multiple search strings.. We evaluate the area and latency cost of our approach and find that the match cost per search pattern character is between 4 and 5 logic cells.
引用
收藏
页码:880 / 889
页数:10
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