A versatile timing unit for traffic shaping, policing and charging in packet-switched networks

被引:0
|
作者
Sarakis, L. [1 ,2 ]
Moshopoulos, N. [3 ]
Loukatos, D. [2 ]
Marinis, K. [2 ]
Stathopoulos, P. [2 ]
Mitrou, N. [2 ]
机构
[1] Inst Informat & Telecommun, Natl Ctr Sci Res Demokritos, Athens, Greece
[2] Natl Tech Univ Athens, Sch Elect & Comp Engn, GR-15773 Athens, Greece
[3] ATMEL HELLAS SA, IC Grp, Athens, Greece
关键词
temporal resolution; hardware/software co-design; token bucket; effective rate; QoS;
D O I
10.1016/j.sysarc.2007.08.004
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Timing has a key role in several traffic control functions encountered in modern packet-switched networks. In order to be effective, a timing unit must provide fine resolution, be simple to implement and scale well with the number of controlled traffic streams. This paper addresses the design, implementation and evaluation of a timing unit that can support accurate and efficient implementations of traffic shaping, policing and charging in packet-switched networks. The timing unit is implemented in hardware and, therefore, overcomes constraints associated with software-based timers. It accommodates a pool of independently-clocked timers and counters, organised in timing blocks, and, consequently, is able to support, in parallel, traffic streams with diverse timing requirements. The design supports shaping and policing through token buckets, leaky buckets and a scheme, variation of the token bucket, that aims at providing statistical quality of service guarantees by exploiting the effective rate concept. Charging is supported by dedicated counters that measure the utilization of the effective rate. The granularity of the timing unit is adjustable in run-time to adapt to changes in the rate parameters of the shaping and policing functions. The validation of the timing unit is done through the development of a prototype board consisting of programmable hardware and embedded software blocks. The temporal resolution of the timing unit and the advantages of the hardware/ software co-design are experimentally evaluated. (C) 2007 Elsevier B.V. All rights reserved.
引用
收藏
页码:491 / 506
页数:16
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