Three-Phase Impedance-Source Inverter With Common-Mode Voltage Reduction

被引：6
|
作者：
Truong-Duy Duong [1 ]
Minh-Khai Nguyen [2 ]
Tan-Tai Tran [3 ]
Dai-Van Vo [1 ]
Lim, Young-Cheol [1 ]
Choi, Joon-Ho [1 ]
机构：
[1] Chonnam Natl Univ, Dept Elect Engn, Gwangju 61186, South Korea
[2] Ho Chi Minh City Univ Technol & Educ, Fac Elect & Elect Engn, Ho Chi Minh City 700000, Vietnam
[3] Ind Univ Ho Chi Minh City, Fac Elect Engn Technol, Ho Chi Minh City 700000, Vietnam
来源：
IEEE ACCESS | 2021年 / 9卷
基金：
新加坡国家研究基金会;
关键词：
Inverters; Voltage; Topology; Pulse width modulation; Switches; Urban areas; Stress; Impedance-source inverter; common-mode voltage; quasi-switched boost inverter; single-stage inverter; space-vector modulation; SWITCHED-BOOST INVERTER; MODULATION TECHNIQUES; PWM CONTROL; ATTENUATION; TOPOLOGIES;
D O I：
10.1109/ACCESS.2021.3134996
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
This article presents a three-phase two-level impedance-source inverter to decrease the magnitude of common-mode voltage and enhance the output voltage capability. Shoot-through states are inserted into zero states to ensure for boosting voltage and improving the output voltage quality with higher modulation index. Moreover, the advantage of the proposed solution is as low voltage stress on capacitors, switches and diodes in impedance-source network. The theoretical analysis, circuit analysis, and logic functions of the proposed solution are introduced. A comparison between the proposed solution with other impedance-source inverter topologies for common-mode voltage reduction is also reported. Besides that, the simulation verification and 1-kW experimental prototype were developed to verify the proposed solution.
引用
收藏
页码：164510 / 164519
页数：10
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