Improved gate process control at the 130nm node using spectroscopic ellipsometry based profile metrology

The ability to control the cross-sectional profile of polysilicon gate structures on semiconductor devices is paramount to maximize product yield and transistor performance. Tighter control of gate profile parameters leads to a tighter distribution of transistor speeds, resulting in more optimized and consistent device performance. Furthermore, the ability to correlate physical in-line profile measurements taken at gate patterning process steps, to back-end-of-line device parametric test results, enables semiconductor manufacturers to minimize the cost per good die produced, by accurately screening out-of-spec product early in the process flow. The significant increase in the number of chips on today's 300mm wafers heightens the importance of obtaining reliable in-line data. In addition, the reduction of design rules to 130nm and below is driving precision requirements on metrology to <1nm in order to maintain acceptable precision-to-tolerance (P/T) ratios. Historical methods of in-line metrology (Low Voltage Scanning Electron Microscopy, Atomic Force Microscopy, and Electrical Critical Dimension Measurement) all face limitations with regards to precision, correlation, or throughput; This paper will demonstrate the use of Spectroscopic Ellipsometry to provide fast, accurate, and precise two-dimensional profile information on polysilicon gate structures. This metrology technique is currently being utilized for in-line process control and product disposition, at the gate lithography and etch process steps, on 130nm generation logic devices manufactured in Texas Instruments' DMOS 6 300mm wafer fabrication facility. A brief description of the measurement theory and gate profile measurement solution for both dense and isolated structures will be given. This will be followed by data generated from DMOS 6 production material. Using Spectroscopic Ellipsometry, precision results of <0.5nm for CD and height, and <0.25 degrees for profile sidewall angle were obtained at both the lithography and etch measurement steps. Data will be presented showing correlation of gate etch profile parameters to post-metallization transistor drive current (I-Drive) that is equivalent or superior to existing metrology techniques. Finally, examples of where SpectroscopicEllipsometry has both increased sensitivity and shortened response time to gate etch process excursions will be presented.