PCB Layout Design for EMI/EMC Compliance

被引：0
|
作者：
Chand, Prakash [1 ]
Gangopadhyay, B. N. [1 ]
Kumar, Meenakshi [1 ]
机构：
[1] Def Elect Applicat Lab, Dehra Dun 248001, Uttar Pradesh, India
来源：
INCEMIC 2006: 9TH INTERNATIONAL CONFERENCE ON ELECTROMAGNETIC INTERFERENCE AND COMPATIBILITY, PROCEEDINGS | 2006年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper is. based on the background studies. and experiences in identification and implementation of the fundamental design techniques for making a PCB layout that needs a high degree of compliance for EMI/EMC. It suggests the use of techniques for considering PCBs configuration, Interplane coupling, Grounding Methods, use of Bypassing and Decoupling capacitor and many other techniques required for making good PCB layout design.
引用
收藏
页码：19 / 24
页数：6
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