Exploring CMP solutions to planarity challenges with tungsten plugs

Tungsten plugs have been used in the recent past for local interconnects and for level-level interconnect applications. The resist etch back process has been the method of choice historically for planarization purposes. However, with the advent of chemical mechanical polishing (CMP) technology, one has an alternate path for achieving global planarity. Process integration issues have to be worked out. In this paper, we have explored the effect of various process parameters and consumable changes on planarity/non-uniformity. The across wafer and wafer-wafer non-uniformity 1-sigma was reduced from 10-20% to < 10%. The optimized process was verified on a 500 wafer extended run to obtain > 5000 Angstrom/min with 5.5% wafer-wafer removal variation. (C) 1998 Elsevier Science S.A. All rights reserved.