Decoder Design for Non-binary LDPC Codes

被引：0

作者：

Liu, Fei ^{[1
]}

Li, Haitao ^{[1
]}

机构：

[1] Beijing Univ Technol, Coll Elect Informat & Control Engn, Beijing 100124, Peoples R China

来源：

2011 7TH INTERNATIONAL CONFERENCE ON WIRELESS COMMUNICATIONS, NETWORKING AND MOBILE COMPUTING (WICOM) | 2011年

关键词：

NB-LDPC; EMS; Architecture; COMPLEXITY;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Non-binary low-density parity-check (NB-LDPC) codes can achieve better error-correcting performance than binary LDPC codes when the code length is moderate. In this paper, we give the different initial step for different modulation and present a hardware implementation of the extended min-sum (EMS) decoding algorithm for non-binary LDPC codes. Moreover, an FPGA simulation over GF(16) is given to demonstrate the efficiency of the presented techniques.

引用

页数：4

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