Construction of Delay-Driven GNR Routing Tree

被引:2
|
作者
Yan, Jin-Tai [1 ]
Yen, Chia-Heng [2 ]
机构
[1] Tainan Natl Univ Arts, Off Res & Dev, Tainan, Taiwan
[2] Natl Chiao Tung Univ, Inst Bioinformat & Syst Biol, Hsinchu, Taiwan
关键词
D O I
10.1109/newcas44328.2019.8961288
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
It is known that graphene nanoribbon (GNR) based devices and interconnects can be treated to be better alternative in nano-scale designs. In this paper, given a source pin and a set of target pins inside a GNR grid-based routing plane, based on the consideration of the wirelength and bending delay in graphene nanoribbon, an efficient routing algorithm can be proposed to construct a delay-driven GNR routing tree with minimizing the total wirelength for the target pins. Compared with Das's algorithm [9] on total wirelength and maximum source-to-target delay, the experimental results show that our proposed routing algorithm only uses 8.05% of the extra wirelength to reduce 23.13% of the maximum delay in the construction of a delay-driven GNR routing tree for 6 tested examples on the average.
引用
收藏
页数:4
相关论文
共 50 条
  • [1] Single-Layer Delay-Driven GNR Nontree Routing Under Resource Constraint for Yield Improvement
    Yan, Jin-Tai
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2020, 28 (03) : 736 - 749
  • [2] Delay-Driven Routing for Low-Duty-Cycle Sensor Networks
    Fan, Zuzhi
    INTERNATIONAL JOURNAL OF DISTRIBUTED SENSOR NETWORKS, 2013,
  • [3] A provably tight delay-driven concurrently congestion mitigating global routing algorithm
    Samanta, Radhamanjari
    Erzin, Adil I.
    Raha, Soumyendu
    Shamardin, Yuriy V.
    Takhonov, Ivan I.
    Zalyubovskiy, Vyacheslav V.
    APPLIED MATHEMATICS AND COMPUTATION, 2015, 255 : 92 - 104
  • [4] Timing Driven Routing Tree Construction
    Tu, Peishan
    Chow, Wing-Kai
    Young, Evangeline F. Y.
    2017 ACM/IEEE INTERNATIONAL WORKSHOP ON SYSTEM LEVEL INTERCONNECT PREDICTION (SLIP), 2017,
  • [5] DDBDD: Delay-driven BDD synthesis for FPGAs
    Cheng, Lei
    Chen, Deming
    Wong, Martin D. F.
    2007 44TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2, 2007, : 910 - +
  • [6] DDBDD: Delay-driven BDD synthesis for FPGAs
    Cheng, Lei
    Chen, Deming
    Wong, Martin D. F.
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2008, 27 (07) : 1203 - 1213
  • [7] DALS: Delay-driven Approximate Logic Synthesis
    Zhou, Zhuangzhuang
    Yao, Yue
    Huang, Shuyang
    Su, Sanbao
    Meng, Chang
    Qian, Weikang
    2018 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD) DIGEST OF TECHNICAL PAPERS, 2018,
  • [8] Delay-Constrained GNR Routing for Layer Minimization
    Yan, Jin-Tai
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2020, 28 (11) : 2356 - 2369
  • [9] Delay-driven oscillations in the Notch signalling network
    Monk, Nick
    Momiji, Hiroshi
    MECHANISMS OF DEVELOPMENT, 2009, 126 : S287 - S287
  • [10] Delay-driven Hopf bifurcation in a networked Malaria model
    Tian, Canrong
    Liu, Yong
    APPLIED MATHEMATICS LETTERS, 2022, 132