共 50 条
- [1] A mixed-signal VLSI neural network with on-chip learning [J]. CCECE 2003: CANADIAN CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING, VOLS 1-3, PROCEEDINGS: TOWARD A CARING AND HUMANE TECHNOLOGY, 2003, : 591 - 594
- [2] Utilizing On-chip Resources for Testing Embedded Mixed-signal Cores [J]. JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2009, 25 (06): : 301 - 308
- [3] On-chip impulse response generation for analog and mixed-signal testing [J]. INTERNATIONAL TEST CONFERENCE 2004, PROCEEDINGS, 2004, : 262 - 270
- [4] Utilizing On-chip Resources for Testing Embedded Mixed-signal Cores [J]. Journal of Electronic Testing, 2009, 25 : 301 - 308
- [5] On-chip signal level evaluation for mixed-signal ICs using digital window comparators [J]. ETW 2001: IEEE EUROPEAN TEST WORKSHOP, PROCEEDINGS, 2001, : 68 - 72
- [6] On-chip analog signal generator for mixed-signal Built-In Self-Test [J]. IEEE 1998 CUSTOM INTEGRATED CIRCUITS CONFERENCE - PROCEEDINGS, 1998, : 549 - 552
- [9] On-chip sinusoidal signal generation with harmonic cancelation for analog and mixed-signal BIST applications [J]. Analog Integrated Circuits and Signal Processing, 2015, 82 : 67 - 79
- [10] An on-chip multi-channel waveform monitor for mixed-signal VLSI diagnostics [J]. ESSCIRC 2005: PROCEEDINGS OF THE 31ST EUROPEAN SOLID-STATE CIRCUITS CONFERENCE, 2005, : 295 - 298