A power-efficient 33 GHz 2:1 static frequency divider in 0.12-μm SOICMOS

被引：37

作者：

Plouchart, JO ^{[1
]}

Kim, J ^{[1
]}

Recoules, H ^{[1
]}

Zamdmer, N ^{[1
]}

Tan, Y ^{[1
]}

Sherony, M ^{[1
]}

Ray, A ^{[1
]}

Wagner, L ^{[1
]}

机构：

[1] IBM Corp, Semicond Res & Dev Ctr, Hopewell Jct, NY 12533 USA

来源：

2003 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS (RFIC) SYMPOSIUM, DIGEST OF PAPERS | 2003年

关键词：

D O I：

10.1109/RFIC.2003.1213955

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 2:1 static frequency divider was fabricated in a 0.12-mum SOI CMOS technology. The divider exhibits a maximum operating frequency of 33 GHz. When the power consumption is scaled down to 2.7 mW, a maximum operating frequency of 25 GHz is measured.

引用

页码：329 / 332

页数：4

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