p-n CHANNEL JUNCTIONLESS TRANSISTOR

被引：0

作者：

Yang, Hui ^{[1
]}

Guo, Yufeng ^{[1
]}

Hong, Yang ^{[1
]}

Yao, Jiafei ^{[1
]}

Zhang, Jun ^{[1
]}

Ji, Xincun ^{[1
]}

机构：

[1] Nanjing Univ Posts & Telecommun, Nanjing 210003, Peoples R China

来源：

2014 12TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT) | 2014年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We propose a double gate junction less transistor with P-type and N-type doping in vertical direction but laterally uniform doping in the channel that we call the P-N channel double gate junctionless transistor (PN-DG-JLT). The characteristics of PN-DG-JLT were compared with N-channel double gate junctionless transistor using 2-D numerical simulation. The PN-DG-JLT exhibits a favorable subthreshold leakage current and ON to OFF current ratio by controlling doping concentration of channel.

引用

页数：3

共 50 条

[1] Impact of Fringing Fields in a p-Channel Junctionless Transistor
Baruah, Ratul Kumar
Paily, Roy P.
[J]. 2014 IEEE 2ND INTERNATIONAL CONFERENCE ON EMERGING ELECTRONICS (ICEE), 2014,
[2] Transport characteristics of Double Gate N-Channel Junctionless Transistor
Paul, Tanmoy Kumar
Khosru, Quazi D. M.
[J]. 2016 9TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING (ICECE), 2016, : 389 - 392
[3] Surrounded Channel Junctionless Field Effect Transistor
Das, Namita
Sarma, Kaushik Chandra Deva
[J]. 2020 INTERNATIONAL CONFERENCE ON COMPUTATIONAL PERFORMANCE EVALUATION (COMPE-2020), 2020, : 608 - 610
[4] Design and analysis of energy efficient semi-junctionless n+n+p heterojunction p-channel tunnel field effect transistor
Ahangari, Zahra
[J]. MATERIALS RESEARCH EXPRESS, 2019, 6 (06):
[5] Junctionless Biristor: A Bistable Resistor Without Chemically Doped P-N Junctions
Kumar, Mamidala Jagadesh
Maheedhar, Maram
Varma, P. Pradeep
[J]. IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2015, 3 (04): : 311 - 315
[6] Atomistic Modelling of p-channel Junctionless Silicon Nanowire Transistor: k.p approach
Akhavan, N. D.
Jolley, G.
Umana-Membreno, G.
Antoszewski, J.
Faraone, L.
[J]. 2014 INTERNATIONAL CONFERENCE ON NANOSCIENCE AND NANOTECHNOLOGY (ICONN), 2014, : 17 - 20
[7] Negative Differential Resistance Transistor with Organic p-n Heterojunction
Kobashi, Kazuyoshi
Hayakawa, Ryoma
Chikyow, Toyohiro
Wakayama, Yutaka
[J]. ADVANCED ELECTRONIC MATERIALS, 2017, 3 (08):
[8] Physics and characteristics of a lateral p-n junction tunneling transistor
Vyurkov, V
Ryzhii, V
Vaccaro, PO
Aida, T
[J]. PHYSICA E-LOW-DIMENSIONAL SYSTEMS & NANOSTRUCTURES, 2004, 21 (2-4): : 867 - 871
[9] Junctionless Π-gate transistor with indium gallium arsenide channel
Guo, H. X.
Zhang, X.
Zhu, Z.
Kong, E. Y. J.
Yeo, Y. -C.
[J]. ELECTRONICS LETTERS, 2013, 49 (06) : 402 - 404
[10] Characteristics of a Novel Poly-Si P-Channel Junctionless Thin-Film Transistor With Hybrid P/N-Substrate
Cheng, Ya-Chi
Chen, Hung-Bin
Su, Jun-Ji
Shao, Chi-Shen
Thirunavukkarasu, Vasanthan
Chang, Chun-Yen
Wu, Yung-Chun
[J]. IEEE ELECTRON DEVICE LETTERS, 2015, 36 (02) : 159 - 161

← 1 2 3 4 5 →