A Simple Digital Architecture for a Harmonic-Cancelling Sine-Wave Synthesizer

被引:0
|
作者
Aluthwala, Pasindu [1 ]
Weste, Neil [2 ]
Adams, Andrew
Lehmann, Torsten [1 ]
Parameswaran, Sri [1 ]
机构
[1] Univ New South Wales, Sydney, NSW 2052, Australia
[2] NHEW R&D Pty Ltd, Newcastle, NSW, Australia
关键词
Sinusoids; digital-oscillator; low harmonic distortion; CANCELLATION TECHNIQUE; LOW-POWER; LOW THD; OSCILLATOR;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Sine-wave synthesizers are a core requirement in many electronic applications, such as communication systems, and test and verification of analog/mixed-signal electronic systems. In sine-wave synthesizers, there exists a compromise between output spectral purity and hardware complexity. Harmonic-cancelling sine-wave synthesizers (HCSSs) allow spectrally pure signal synthesis at low hardware cost, compared to conventional sine-wave synthesis approaches. In this paper, we propose a digital HCSS hardware architecture, which is simpler, more hardware efficient and more programmable compared to state of the art HCSSs. The proposed architecture has been verified through a prototype built from an FPGA and discrete components. Prototype results demonstrate 51.9 dBc spurious free dynamic range (SFDR) and an output frequency range from 100 Hz to 100 kHz.
引用
收藏
页码:2113 / 2116
页数:4
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