AN ASIC FOR DIGITAL ADDITIVE SINE-WAVE SYNTHESIS

被引:3
|
作者
HOUGHTON, AD
FISHER, AJ
MALET, TF
机构
[1] Univ of Sheffield, Sheffield
关键词
D O I
10.2307/3680652
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
The ASIC is designed and fabricated with 1μm standard-cell technology and total chip area of about 27 mm2. Because of space limitations, the prototype ASIC can only integrate 127 sine-wave generators and one noise source into the device. The chip contains a memory controller for the external register files, and a control logic for the external multiplier accumulator. If it is necessary to ease external timing constraints, the device can be reconfigured to produce only 63 sine waves. Further, the ASWS engine performs as expected, and has been used successfully to synthesize a number of musical and speech sounds including piano, guitar, drums, flute, as well as spoken words.
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页码:26 / 31
页数:6
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