This paper proposes a new design technique of a stable, low input impedance, high sensitivity, high gain and low-power Potentiostat using carbon nanotube FETs (CNTFETs) at 32 nm level that utilizes different input voltages for verifying voltage follower performance. The fully differential architecture suppresses the common mode interference. Extensive simulations have been performed to investigate the distribution of the power and delay of the CNTFET-based Potentiostat due to variations in the supply voltage and temperature of the CNTFETs. The CNTFET-based Potentiostat demonstrates that it tolerates the PVT (Process, Voltage, and Temperature) variations significantly better than its CMOS counterpart.