Design of a 2.4-GHz 2.2-mW CMOS RF Receiver Front-End for BLE Applications

A sliding-IF RF receiver front-end is designed in 65 nm CMOS general process for Bluetooth low-energy applications. For low power consumption, the receiver front-end circuits are designed with a 1-V supply voltage. Simulations show that the receiver has a 55.5 dB full-path maximum gain, and -43.5 dBm input-referred P-1db while dissipating only 2.2 mW. At the maximum gain, the noise figure is 3.2 dB, which corresponds to the sensitivity of -98.8 dBm when the minimum required SNR of a demodulator is 12 dB.