Rethinking Insertions to B+-Trees on Coupled CPU-GPU Architectures

被引:2
|
作者
Huang, Han [1 ]
Luan, Hua [1 ]
机构
[1] Beijing Normal Univ, Sch Artificial Intelligence, Beijing, Peoples R China
关键词
B+-trees; batch insertions; the coupled architecture; co-processing;
D O I
10.1109/ISPA-BDCloud-SocialCom-SustainCom52081.2021.00139
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The B+-tree is a well-known data structure used as an index in database systems, online analytical processing and so on. Leveraging GPUs that provide amounts of computing resources to accelerate indexing is an attractive choice. In this paper, we revisit batch insertions to B+-trees on coupled CPU-GPU architectures to exploit the computing power of co-processors. First, we design a phase-based bulk insertion method applicable for the single CPU and integrated GPU processor. The insertion process is divided into six phases which proceed sequentially. A work group is responsible for inserting keys into a leaf node to reduce irregular memory accesses in the group. Second, we propose a co-processing batch insertion algorithm to utilize the CPU and the integrated GPU simultaneously. Based on the characteristics of processors and tasks, the sorting and calculating tasks are assigned to the CPU while searching and inserting into leaf nodes are performed jointly by two processors. In addition, a pipeline strategy is adopted to overlap sorting the next batch of keys with updating nodes in the current batch. Our experimental study shows that the phase-based insertion method on the CPU and the integrated GPU provides speedups up to 2.55 and 2.27 respectively over PALM, a parallel latch-free B+-tree designed for multi-core processors. The co-processing algorithm further increases the performance by a factor of 33% at most compared with the CPU method and 63% over the GPU method. To the best of our knowledge, this paper is the first effort to consider both the CPU and the integrated GPU to redesign B+-trees insertions.
引用
收藏
页码:993 / 1001
页数:9
相关论文
共 50 条
  • [1] Optimizing B+-Tree Searches on Coupled CPU-GPU Architectures
    Huang, Han
    Luan, Hua
    [J]. ALGORITHMS AND ARCHITECTURES FOR PARALLEL PROCESSING, ICA3PP 2020, PT I, 2020, 12452 : 401 - 415
  • [2] CPU-Assisted GPGPU on Fused CPU-GPU Architectures
    Yang, Yi
    Xiang, Ping
    Mantor, Mike
    Zhou, Huiyang
    [J]. 2012 IEEE 18TH INTERNATIONAL SYMPOSIUM ON HIGH PERFORMANCE COMPUTER ARCHITECTURE (HPCA), 2012, : 103 - 114
  • [3] Denial of Service in CPU-GPU Heterogeneous Architectures
    Wen, Hao
    Zhang, Wei
    [J]. 2020 IEEE HIGH PERFORMANCE EXTREME COMPUTING CONFERENCE (HPEC), 2020,
  • [4] In-Cache Query Co-Processing on Coupled CPU-GPU Architectures
    He, Jiong
    Zhang, Shuhao
    He, Bingsheng
    [J]. PROCEEDINGS OF THE VLDB ENDOWMENT, 2014, 8 (04): : 329 - 340
  • [5] Reducing CPU-GPU Interferences to Improve CPU Performance in Heterogeneous Architectures
    Wen, Hao
    Zhang, Wei
    [J]. Journal of Computing Science and Engineering, 2020, 16 (04) : 131 - 145
  • [6] Accelerating MapReduce on a Coupled CPU-GPU Architecture
    Chen, Linchuan
    Huo, Xin
    Agrawal, Gagan
    [J]. 2012 INTERNATIONAL CONFERENCE FOR HIGH PERFORMANCE COMPUTING, NETWORKING, STORAGE AND ANALYSIS (SC), 2012,
  • [7] EXPECTED BEHAVIOR OF B+-TREES UNDER RANDOM INSERTIONS
    BAEZAYATES, RA
    [J]. ACTA INFORMATICA, 1989, 26 (05) : 439 - 471
  • [8] Elastic Multi-Resource Fairness: Balancing Fairness and Efficiency in Coupled CPU-GPU Architectures
    Tang, Shanjiang
    He, BingSheng
    Zhang, Shuhao
    Niu, Zhaojie
    [J]. SC '16: PROCEEDINGS OF THE INTERNATIONAL CONFERENCE FOR HIGH PERFORMANCE COMPUTING, NETWORKING, STORAGE AND ANALYSIS, 2016, : 875 - 886
  • [9] A Sample-Based Dynamic CPU and GPU LLC Bypassing Method for Heterogeneous CPU-GPU Architectures
    Wang, Xin
    Zhang, Wei
    [J]. 2017 16TH IEEE INTERNATIONAL CONFERENCE ON TRUST, SECURITY AND PRIVACY IN COMPUTING AND COMMUNICATIONS / 11TH IEEE INTERNATIONAL CONFERENCE ON BIG DATA SCIENCE AND ENGINEERING / 14TH IEEE INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS, 2017, : 753 - 760
  • [10] A comparison of Algebraic Multigrid Bidomain solvers on hybrid CPU-GPU architectures
    Centofanti, Edoardo
    Scacchi, Simone
    [J]. COMPUTER METHODS IN APPLIED MECHANICS AND ENGINEERING, 2024, 423