Evaluation of a refinement-driven SysteC™ -: Based design flow

被引：0

作者：

Schubert, T ^{[1
]}

Hanisch, J ^{[1
]}

Gerlach, J ^{[1
]}

Appell, JE ^{[1
]}

Nebel, W ^{[1
]}

机构：

[1] OFFIS Res Inst, D-26121 Oldenburg, Germany

来源：

DESIGNERS' FORUM: DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION | 2004年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper describes the experiences and results that were made with a SystemC-based design flow for the implementation of an automotive digital hardware design. We present the refinement process starting from an initial high-level executable specification in C++ via SystemC down to a Gate-level description. We compare the synthesis results of the SystemC-based system-level design flow with those from a traditional VHDL-based register-transfer level designflow in terms of efficiency and simulation performance.

引用

页码：262 / 267

页数：6

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