Design of 65 nm CMOS SRAM for Space Applications: a Comparative Study

被引:0
|
作者
Gorbunov, Maxim S. [1 ,2 ]
Dolotov, Pavel S. [1 ]
Antonov, Andrey A. [1 ]
Zebrev, Gennady I. [2 ]
Emeliyanov, Vladimir V. [3 ]
Boruzdina, Anna B.
Petrov, Andrey G.
Ulanova, Anastasia V.
机构
[1] Russian Acad Sci, Sci Res Inst Syst Anal, Nakhimovsky Prosp 36-1, Moscow 117218, Russia
[2] Natl Res Nucl Univ, Moscow Engn Phys Inst, Dept Micro & Nanoelect, Moscow, Russia
[3] Res Inst Scientif Instruments, Moscow, Russia
关键词
SEU; SBU; MCU; DICE; critical charge; SRAM; RHBD; heavy ions; protons; TID; CMOS; guard rings; HEAVY-ION; MITIGATION; CHARGE; UPSETS; BULK;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
We study the design of different SRAM blocks based on a commercial 65 nm CMOS technology and discuss the experimental results for X-ray, proton and heavy ion irradiation campaigns. The results obtained show that the number of affected bits depends not only on LET value, but also on the localization of a strike. DICE cells demonstrate about 2-3 orders of magnitude lower than cross-sections for 6T-cells due to the 2 mu m nodal spacing of sensitive pairs. Solid and intermittent guard rings has high effectiveness in SEL elimination.
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页数:7
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