Package on Package DDR Power Integrity Design

被引:0
|
作者
Shu, Heng Chuan [1 ]
Quek, Li Chuang [1 ]
机构
[1] Intel Microelect Malaysia, Bayan Lepas 11900, Penang, Malaysia
关键词
power delivery; DDR; Package on package (PoP); System On Chip (SoC);
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The IC (integrated circuit) packaging technology has evolved and transitioned from wirebond to flipchip, multi-chip package (MCP) to 3D stacking. PoP (Package on Package) enables the vertical integration of memory on the conventional package which helps to achieve higher component density on the platform. PoP technology is very important for modern electronics devices as it features more function in very compact devices such as smart phones and tablets. While PoP offers denser component count on platform, it also comes with electrical challenges such as Power Integrity issue. Conventional Power Integrity Design and Methodology may not hold for PoP technology.
引用
收藏
页码:559 / 562
页数:4
相关论文
共 50 条
  • [31] PACKAGE ASSEMBLY DESIGN KITS – THE FUTURE OF ADVANCED PACKAGE DESIGN
    Fuentes R.
    Advancing Microelectronics, 2023, Symposium : 5 - 8
  • [32] Overview of Power Integrity Solutions on Package and PCB: Decoupling and EBG Isolation
    Wu, Tzong-Lin
    Chuang, Hao-Hsiang
    Wang, Ting-Kuang
    IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, 2010, 52 (02) : 346 - 356
  • [33] Signal/Power Integrity Tradeoffs in Automotive SoC Package Design (LPDDR4 Case Study)
    Silva, Benjamin
    Shen, Yan Fen
    Eldessouki, Mohamed
    2018 IEEE 27TH CONFERENCE ON ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS (EPEPS), 2018, : 35 - 37
  • [34] Computationally efficient power integrity simulation for system-on-package applications
    Bharath, Krishna
    Engin, Ege
    Swaminathan, Madhavan
    Uriu, Kazuhide
    Yamada, Toru
    2007 44TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2, 2007, : 612 - +
  • [35] Power Integrity Solution While Package integrating Multi-Die
    Xiao, Lingling
    Liao, Chengyu
    Zhang, Tension
    He, Hongwen
    2022 23RD INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, ICEPT, 2022,
  • [36] High speed DDR performance in 4 vs 6 layer FCBGA package design
    Chan, E
    Chen, HB
    Chung, CY
    54TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, VOLS 1 AND 2, PROCEEDINGS, 2004, : 314 - 319
  • [37] System Power Integrity Impact by Package Power/Ground Balls Assignment and Decoupling Capacitors
    Lin, Cheng-Hsun
    Wang, Chen-Chao
    Wang, Hung-Yu
    2012 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (APEMC), 2012, : 265 - 268
  • [38] THE EFFECTS OF PACKAGE INTEGRITY ON DIP RELIABILITY
    DIAMANT, MH
    PROCEEDINGS ANNUAL RELIABILITY AND MAINTAINABILITY SYMPOSIUM, 1982, (NSYM): : 390 - 393
  • [39] High Reliability Power Package Design for Automotive Requirements
    Kim, Byong Jin
    Ryu, Dong Su
    Ting, Jia Yunn
    Jeon, HyeongIl
    Chim, Weng Tuck
    Whitchurch, Nathan
    2018 19TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2018, : 1209 - 1212
  • [40] Review on Thermal Design of Power Device Package Structures
    Wang L.
    Wei X.
    Tang X.
    Lin Z.
    Zhao Z.
    Li X.
    Zhongguo Dianji Gongcheng Xuebao/Proceedings of the Chinese Society of Electrical Engineering, 2024, 44 (07): : 2748 - 2773