A modelling and simulation approach for radio frequency (RF) parasitic effects reduction in wafer-level packaging (WLP) of RF-MEMS passive components

RF-MEMS, i.e. micro electro mechanical-systems (MEMS) for radio frequency (RF) passive components, started to make their way into mass-market applications in the telecommunication segment. One critical aspect to ensure easy employment of such devices within systems and sub-systems is that of packaging and encapsulation. In packaging of RF-MEMS, next to the protection of the fragile movable structures and membranes, optimisation of the package electrical performance plays a very important role. In this work, a wafer-level packaging process is investigated and optimised in order to minimise its electrical parasitic effects. The capping silicon substrate resistivity, the substrate thickness and the geometry of through-silicon vias are optimised relying on finite element method electromagnetic simulations. Moreover, a preliminary analysis on the electromagnetic effects of the wafer-to-wafer bonding techniques (i.e. solder bump reflow and Isotropic or anisotropic conductive adhesive - ICA/ACA) is presented.