RF-MEMS wafer-level packaging using through-wafer interconnect

被引：21
|
作者：
Tian, J. [1 ]
Sosin, S. [1 ]
Iannacci, J. [1 ,2 ]
Gaddi, R. [2 ]
Bartek, M. [1 ]
机构：
[1] Delft Univ Technol, Lab High Frequency Technol & Components DIMES, NL-2628 CD Delft, Netherlands
[2] Univ Bologna, ARCES DEIS, I-40123 Bologna, Italy
来源：
SENSORS AND ACTUATORS A-PHYSICAL | 2008年 / 142卷 / 01期
关键词：
RF-MEMS; Cu plating; through-wafer interconnect; wafer-level packaging;
D O I：
10.1016/j.sna.2007.09.004
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, development of a wafer-level packaging (WLP) process suitable for RF-MEMS applications is presented. The packaging concept is based on a high-resistivity silicon capping substrate that is wafer-level bonded to an RF-MEMS device wafer providing MEMS device protection and vertical electrical signal interconnect. The capping substrate contains Cu-plated through-wafer electrical vias and optional through-substrate cavities allowing for hybrid integration. The RF-MEMS device wafer and the capping substrate are bonded using either solder reflow or an electrically conductive adhesive. After solder bump formation and singulation, this packaging solution results in surface-mount technology compatible components. Moreover, the presented WLP solution allows hybrid integration of additional IC dies that are flip-chip bonded within the capping substrate cavities. (c) 2007 Elsevier B.V. All rights reserved.
引用
收藏
页码：442 / 451
页数：10
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