Semi-formal test generation for a block of industrial DSP

被引：0
|
作者：
Dushina, J [1 ]
Benjamin, M [1 ]
Geist, D [1 ]
机构：
[1] STMicroelectronics, Bristol BS32 4SQ, Avon, England
来源：
19TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS | 2001年
关键词：
D O I：
10.1109/VTS.2001.923429
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
This article describes an industrial application of the Genevieve test generation methodology. The Genevieve approach [I] uses formal techniques to generate test suites for specific design behaviour The example, which is a parr of the ST100 DSP, was chosen in order to highlight real life problems such as big data structures, complex control log ic, and complex environments where it is difficult to determine how to drive the complete system to ensure a given behaviour in the unit under test.
引用
收藏
页码：131 / 136
页数：6
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