CORPS - A pipelined fair packet scheduler for high speed switches

被引:3
|
作者
Cavendish, D [1 ]
机构
[1] NEC USA, C&C Res Labs, Princeton, NJ 08540 USA
关键词
D O I
10.1109/HPSR.2000.856647
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Input queues have become an attractive switch architecture, since it was shown that throughput up to 100% is achievable when Virtual Output Queue (VOQ) is used. Although schedulers for VOQ switches have been proposed, pipelined schedulers, whose processing requirements increase at most linearly with line speeds, have not yet matured. In this document, we introduce CORPS, a Pipelined Scheduler which allows fair scheduling among input lines of a crossbar high speed switch fabric. By means of a round-robin communication scheme, CORPS achieves scalability to a large number of ports. Moreover, CORPS achieves one scheduling decision per line per slot, by scheduling packets into future slots. The tradeoffs involved are packet delay and utilization.
引用
收藏
页码:55 / 64
页数:10
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