Universal Rules Guided Design Parameter Selection for Soft Error Resilient Processors

被引:0
|
作者
Duan, Lide [1 ]
Zhang, Ying [1 ]
Li, Bin [2 ]
Peng, Lu [1 ]
机构
[1] Louisiana State Univ, Dept Elect & Comp Engn, Baton Rouge, LA 70803 USA
[2] Louisiana State Univ, Dept Expt Stat, Baton Rouge, LA 70803 USA
关键词
error; architectural vulnerability factor; cross-program; design parameter selection; multi-objective optimization;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
High-performance processors suffer from soft error vulnerability due to the increasing on-chip transistor density, shrinking processor feature size, lower threshold voltage, etc. In this paper, we propose to use a rule search strategy, i.e. Patient Rule Induction Method (PRIM), to optimize processor soft error robustness. By exploring a huge microarchitectural design space on the Architectural Vulnerability Factor (AVF), we are capable of generating a set of selective rules on key design parameters. Applying these rules at early design stage effectively identifies the configurations that are inherently reliable to soft errors. Furthermore, we propose a generic approach capable of generating a set of "universal" rules that achieves the optimization of the output variable for different programs in execution. The effectiveness of the universal rule set is validated on programs that are not used in training. This cross-program capability is very useful in the era of multi-threading. Finally, the proposed scheme is extended to multiprocessors where multiple design metrics including reliability, performance and power are balanced. Our proposed methodology is able to generate quantitative and universal solutions for both uniprocessors and multiprocessors.
引用
收藏
页码:247 / 256
页数:10
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  • [12] Formal Verification Guided Automatic Design Error Diagnosis and Correction of Complex Processors
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  • [13] Formal equivalence checking guided soft error vulnerable spots selection
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    Linscott, Ivan R.
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    [J]. 2010 INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM, 2010, : 203 - 212
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    [J]. 24TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2006, : 208 - +
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