Design of Transient Enhanced LDO Circuit for GaN HEMT Gate Driver

被引:0
|
作者
Wang, Li [1 ]
Zhou, Dejin [2 ,3 ]
He, Ningye [1 ]
Xu, Yuan [1 ]
He, Xiaoxiong [4 ]
Chen, Zhenhai [5 ,6 ]
机构
[1] Huangshan Univ, Engn Technol Res Ctr Intelligent Microsyst AnHui, Huangshan, Peoples R China
[2] Fudan Univ, Sch Microelect, Shanghai, Peoples R China
[3] Tsinghua Univ, Wuxi Res Inst Appl Technol, Shanghai, Peoples R China
[4] HeFei Univ Technol, Sch Elect Engn & Automat, Hefei, Peoples R China
[5] Tsinghua Univ, Engn Technol Res Ctr Intelligent Microsyst AnHui, Wuxi Res Inst Appl Technol, Shanghai, Peoples R China
[6] HeFei Univ Technol, Sch Elect Engn & Automat, Huangshan, Peoples R China
关键词
dynamic bias; high-speed comparator; LDO; transient response;
D O I
10.1109/ICICM54364.2021.9660317
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A dynamic bias transient enhanced LDO (Low Dropout regulator) circuit for GaN gate driver is presented in this paper. With high-speed comparator, the bias current of LDO error amplifier can be switched dynamically when large load occurs. The reference voltage of high-speed comparator determines the response time of dynamic bias control circuit. The LDO has been designed in 0.18 mu m BCD (Bipolar-CMOS-DMOS) process, simulation results show that the proposed LDO undershoot voltage is 16.6% of output voltage and the recovery time is less than 0.5us when load current is changed from 0mA to 20mA by frequency is 1MHZ.
引用
收藏
页码:40 / 44
页数:5
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