共 50 条
- [1] Design and implementation of system control for the HDTV video decoder [J]. Dianzi Yu Xinxi Xuebao/Journal of Electronics and Information Technology, 2002, 24 (04):
- [3] Design and implementation of twin transport stream demultiplexor in HDTV decoder [J]. ASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2007, : 729 - 732
- [6] Design and implementation of an FPGA-based digital HDTV video decoder [J]. Dianzi Kexue Xuekan/Journal of Electronics, 20 (06): : 799 - 805
- [7] Design of HDTV video decoder [J]. 5TH INTERNATIONAL SYMPOSIUM ON BROADCASTING TECHNOLOGY, PROCEEDINGS (ISBT'97, BEIJING), 1997, : 164 - 169
- [8] Design and implementation of motion compensator in memory reduced HDTV decoder with embedded compression engine [J]. Multimedia Tools and Applications, 2012, 56 : 597 - 614
- [10] Study and implementation of system control for the HDTV video decoder [J]. 2000 IEEE ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS: ELECTRONIC COMMUNICATION SYSTEMS, 2000, : 871 - 874