A Flexible Multichannel EEG Feature Extractor and Classifier for Seizure Detection

被引:77
|
作者
Page, Adam [1 ]
Sagedy, Chris [1 ]
Smith, Emily [1 ]
Attaran, Nasrin [1 ]
Oates, Tim [1 ]
Mohsenin, Tinoosh [1 ]
机构
[1] Univ Maryland Baltimore Cty, Baltimore, MD 21250 USA
基金
美国国家科学基金会;
关键词
ASIC; electroencephalography (EEG); field-programmable gate array (FPGA); k-nearest neighbor (KNN); logistic regression (LR); low power; naive Bayes (NB); personalized seizure detection; support vector machines (SVMs); PROCESSOR; SIGNALS;
D O I
10.1109/TCSII.2014.2385211
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This brief presents a low-power, flexible, and multichannel electroencephalography (EEG) feature extractor and classifier for the purpose of personalized seizure detection. Various features and classifiers were explored with the goal of maximizing detection accuracy while minimizing power, area, and latency. Additionally, algorithmic and hardware optimizations were identified to further improve performance. The classifiers studied include k-nearest neighbor, support vector machines, naive Bayes, and logistic regression (LR). All feature and classifier pairs were able to obtain F1 scores over 80% and onset sensitivity of 100% when tested on ten patients. A fully flexible hardware system was implemented that offers parameters for the number of EEG channels, the number of features, the classifier type, and various word width resolutions. Five seizure detection processors with different classifiers have been fully placed and routed on a Virtex-5 field-programmable gate array and been compared. It was found that five features per channel with LR proved to be the best solution for the application of personalized seizure detection. LR had the best average F1 score of 91%, the smallest area and power footprint, and the lowest latency. The ASIC implementation of the same combination in 65-nm CMOS shows that the processor occupies 0.008 mm(2) and dissipates 19 nJ at 484 Hz.
引用
收藏
页码:109 / 113
页数:5
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