Order Functions Selection in the Variable-, Fractional-Order PID Controller

In the paper a variable-, fractional-order PID (VFOPID) controller microprocessor realization problems are discussed. In such controllers the variable-, fractional-orders backward differences and sums (VFOBD/S) are used to perform closed-loop system error discrete-time differentiation and integration. In practice all digitally differentiated and integrated signals are noised so there is a necessity of a digital signal pre-filtering. This additionally loads the DSP system. A solution of this problem is proposed. Also the possibilities of the VFOPID controller DSP realizations are presented and compared with the computer simulation results.