Large array device characteristics improvements

被引:0
|
作者
Huang, Shao-Chang [1 ]
Li, Ching-Ho [2 ]
Liao, Chih-Cherng [2 ]
Chen, Li-Fan [1 ]
Chen, Chun-Chih [1 ]
Hsu, Kai-Chieh [1 ]
Lin, Gong-Kai [1 ]
Lin, Chih-Hsuan [1 ]
Lee, Jian-Hsing [1 ]
Kao, Yu-Yung [2 ]
Chen, Ke-Horng [2 ]
机构
[1] Vanguard Int Semicond Corp, Hsinchu, Taiwan
[2] Natl Yang Ming Chiao Tung Univ, Inst Elect & Control Engn, Hsinchu, Taiwan
关键词
Large array device (LAD); Electrostatic discharge (ESD); Resistor to protect gate oxide (RPO); N-type metal oxide semiconductor transistor; (NMOST); Human body mode (HBM); Machine mode (MM); Electrical safe operation area (eSOA); Signal control switching (SCS); Transmission line pulse generator (TLPG); Thermal or 2nd breakdown voltage; current; (Vt2; It2);
D O I
10.1016/j.microrel.2021.114353
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Large array devices are often used for big current driving capabilities in power electronic integrated circuit (IC) applications. Since these structures have big sizes, typical electrostatic discharge protection methodologies cannot be applied in such kind of IC. Otherwise, IC will become too huge to marketing. In this paper, a novel signal control switching architecture for adding large array devices' ESD performances is proposed. Only a little layout area is increased, but a huge electrostatic discharge robustness improvement can be obtained. Moreover, electrical safe operation area characteristics of large array devices are also improved very much with this new scheme. This study is processed in 0.15 mu m Bipolar CMOS DMOS (BCD) with silicide technologies.
引用
收藏
页数:9
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