Toward Design of Advanced System-on-Chip Architecture for Mobile Computing Devices

被引：0
|
作者：
BenSaleh, Mohammed S. [1 ]
Qasim, Syed Manzoor [1 ]
Obeid, Abdulfattah M. [1 ]
机构：
[1] King Abdulaziz City Sci & Technol KACST, Commun & Informat Technol Res Inst, Riyadh 11442, Saudi Arabia
来源：
MOBILE, SECURE, AND PROGRAMMABLE NETWORKING | 2019年 / 11557卷
关键词：
Mobile computing device; System-on-Chip; SoC; System architecture;
D O I：
10.1007/978-3-030-22885-9_9
中图分类号：
TN [电子技术、通信技术];
学科分类号：
0809 ;
摘要：
In this paper, we present the design of an advanced system-on-chip architecture for mobile computing devices. The presented architecture facilitates connectivity to an ARM compatible host processor, high-speed intellectual property (IP) cores and slower peripherals using industry standard advanced microcontroller bus architecture. The system consist of standard set of peripherals, such as clock generator, real time clock, a watchdog timer, an interrupt controller, programmable I/O, (IC)-C-2 Host, SPI master, UARTs, trusted platform module, NAND flash controller and USB controllers. Third party 2D/3D graphics engine, audio/video encoder-decoder, wireless network controller IPs are also integrated to provide a complete platform architecture for the development of mobile computing devices.
引用
收藏
页码：88 / 95
页数：8
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