Hardware failure virtualization via software encoded processing

被引:4
|
作者
Wappler, Ute [1 ]
Fetzer, Christof [1 ]
机构
[1] Tech Univ Dresden, Dept Comp Sci, Dresden, Germany
关键词
D O I
10.1109/INDIN.2007.4384907
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In future, the decreasing feature size will make it much more difficult to built reliable microprocessors. Economic pressure will most likely result in the reliability of microprocessors being tuned for the commodity market. Dedicated reliable hardware is very expensive and usually slower than commodity hardware. Thus, software implemented hardware fault tolerance (SIHFT) will become essential for building safe systems. Existing SIHFT approaches either are not broadly applicable or lack the ability to reliably deal with permanent hardware faults. In contrast, Forin [11 introduced the Vital Coded Microprocessor which reliably detects transient and permanent hardware failures, but is not applicable to arbitrary programs. It requires a dedicated development process and special hardware. We extend Forin's Vital Code, so that it is applicable to arbitrary binary code which enables us to apply it to existing binaries or automatically during compile time. Furthermore, our approach does not require special purpose hardware.
引用
收藏
页码:977 / 982
页数:6
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