A FPGA implementation of variable kernel convolution

被引:0
|
作者
Sriram, Vinay [1 ]
Kearney, David [1 ]
机构
[1] Univ S Australia, Adelaide, SA 5001, Australia
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Convolution is a basic signal and image processing application. In image processing, kernel coefficients of convolution commonly remain constant across the entire image. A less common situation is where the kernel coefficients change in value for each pixel in the image. We call this variable kernel convolution. In this paper we present what we believe are the first three FPGA implementations of variable kernel convolution. The first uses sequential streaming, the second uses pipelining and the third solution uses what we call convolve and gather and its hardware implementation has the highest area time rating (6.7 x better than streaming and 3.4 x better than the pipelining solution). Both pipelining and convolve and gather have the same throughput (which is 25 x that of streaming), but convolve and gather has 71 % smaller area footprint than the pipeline.
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收藏
页码:105 / 109
页数:5
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