Synchronization Approaches for Testing Mixed-Signal SoCs under Real-Time Constraints using On-Chip Capabilities

With increasing complexity, shrinking feature sizes, and lower voltages new challenges arise for the verification of modern system on chip devices (SoCs), e.g., due to effects caused by the interplay of digital and analog peripherals. Many of the undesired effects are only observable in realistic applications. In order to re-enact the incorrect behavior of the SoC under lab conditions additional equipment (e.g., power supplies, pattern generators) is required. Additionally, test parameters need to be transferred to the design under test (DUT) and test results gathered on the device have to be sent back for inspection. Due to the real-time constraints of the user application on the DUT the host can not simply control the DUT 'as is'. In this paper we dissect various synchronization and communication options commonly available on SoCs and evaluate their usefulness for post-silicon testing. A generic solution is presented that provides an abstract API supporting various kinds of interfaces to achieve synchronization and communication, thus enabling convenient adaption to different test setups depending on the available resources.