An all-CMOS self-compensated relaxation oscillator

This paper presents the design of a low-power self-compensated relaxation oscillator. The compensation does not rely on complicated circuit scheme or post-fabrication calibration but rather on the mutual compensation of the MOS transistor parameters, including threshold voltage, carrier mobility, and gate-oxide capacitance. The impacts of transistor parameters on the oscillation frequency are discussed, circuit implementation details and post-layout simulation results are also provided. This work is implemented in 0.18 mu m CMOS process, only MOS transistors are used in the circuit, the chip area is 0.037 mm(2). Simulations show that the total power is 820 nW at the minimum supply voltage of 0.9 V, the temperature coefficient is 121 ppm/ A degrees C in the temperature range of -40 to 85 A degrees C, the line sensitivity is 0.33 %/V in the supply range of 0.9-2 V, the standard deviation is 2.48 % around the average frequency of 1.92 MHz. The proposed oscillator is suitable as clock generations for passive wireless systems.