Mapping multirate multidimensional Digital Signal Processing systems to efficient computer architectural models by multidimensional unfolding

被引：0

作者：

Peng, DM ^{[1
]}

Sharif, H ^{[1
]}

机构：

[1] Univ Nebraska, Dept Elect & Comp Engn, Lincoln, NE USA

来源：

PARALLEL AND DISTRIBUTED COMPUTING SYSTEMS, PROCEEDINGS | 2003年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A direct mapping of multirate Digital Signal Processing (DSP) algorithms to hardware would require data to move at different rates in circuits on the chip, which involves low hardware utilization, complicate routing and synchronization of multiple clock signals. This paper contributes to mapping multidimensional multirate DSP algorithms to uniform-rate special-purpose efficient computer architectural models. Based on the analysis of the reduction of the translated MultiRate Multidimensional Data Flow Graphs, we map multirate multidimensional DSP algorithms to practical architectural models with an extended Push-Up scheduling method.

引用

页码：169 / 174

页数：6

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