A 2.5-gb/s 0.13-μm CMOS current mode logic transceiver with pre-emphasis and equalization

被引:1
|
作者
Zhao, Zhenyu [1 ]
Wang, Jianjun [1 ]
Li, Shaoqing [1 ]
Chen, Jihua [1 ]
机构
[1] Natl Def Univ Technol, Inst Microelect & MIcroprocessors, Changsha 410073, Peoples R China
关键词
CML; transceiver; pre-emphasis; equalization;
D O I
10.1109/ICASIC.2007.4415643
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 2.5-Gb/s current-mode logic (CML) transceiver is implemented in 0.13-mu m CMOS technology for serial inter-chip interconnection. To compensate the channel attenuation and other impairments, pre-emphasis circuit is included at the transmitter and equalizer at the receiver. 6-GHz 3dB bandwidth is achieved through the use of active inductors instead of online spiral inductors. DC offset compensate circuits are employed in the output and input buffers to keep the common mode voltage stable. Layout simulation demonstrates the effectiveness of the transceiver. This transceiver consumes only 160mw of power with 2.5v power supply. The die area of transmitter and receiver are 0.015mm(2), 0.01mm(2) respectively. The transceiver can be operated at 2.5-Gb/s with 100mv receiver sensitivity.
引用
收藏
页码:368 / 371
页数:4
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