Fast Sensing-Time and Hardware-Efficient Eigenvalue-Based Blind Spectrum Sensors for Cognitive Radio Network

被引:19
|
作者
Chaurasiya, Rohit B. [1 ]
Shrestha, Rahul [1 ]
机构
[1] Indian Inst Technol Mandi, Sch Comp & Elect Engn, Kamand 175005, India
关键词
Cognitive radio; spectrum sensing; eigenvalue; VLSI architectures; field programmable gate array (FPGA); application specific integrated circuits (ASIC) design; orthogonal frequency division multiplexing (OFDM); digital video broadcasting - terrestrial (DVB-T); wireless communications; and random matrix theory; IMPLEMENTATION;
D O I
10.1109/TCSI.2019.2941762
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents implementation friendly VLSI-algorithms for maximum-eigenvalue-detection (MED), energy with minimum-eigenvalue (EME), and mean-to-square extreme-eigenvalue (MSEE) based blind spectrum sensing algorithms. We propose to use efficient iterative power-method for computing maximum and minimum eigenvalues for these algorithms that complemented our hardware design. New VLSI architectures based on suggested spectrum sensing algorithms have been presented in this work. We present two types of sensor architectures: (1) memory-less & low-latency (2) memory-based & resource-shared spectrum-sensor architectures. Former type targets to achieve lower sensing time with adequate hardware efficiency and the later ones are highly resource shared to consume lesser hardware with moderate sensing time. Performance analyses of suggested MED, MSEE and EME spectrum sensing algorithms in AWGN environment showed that the detection probability of 0.75 could be achieved at the SNRs of -12 dB, -10 dB and -7 dB respectively. On synthesizing and post-layout simulating our sensor architectures in 90 nm-CMOS process with the supply of 1.2 V, they could operate at the maximum clock frequency up to 408 MHz delivering sensing time in the range of 23-44 mu s. The proposed spectrum sensors have achieved 5.5x and 19x better sensing time and hardware efficiency, respectively, compared to the state-of-the-art implementations. Eventually, the memory-based spectrum sensors are FPGA prototyped and tested, at 100 MHz clock frequency, in DVB-T signal environment with OFDM modulated transmitted signals in 2K size IFFT-mode.
引用
收藏
页码:1296 / 1308
页数:13
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